Vasileios Chiochtour
Computer system structure and its subunits operations. Data representation and Instruction Set Architecture (ISA). Benchmarking and performance evaluation. Organization and structure of the Central Processing Unit (CPU). Instruction execution cycle. Computer Arithmetic and Logic Unit (ALU).registers, register file, memory address. Control Unit, microprogramming. Pipeline. Memory hierarchy, organization, types of memory. SRAM, DRAM, cache memory. I/O subunits, polling technique, interrupts, buses, bus arbitrator, Direct Memory Access.
Final theory exam 75% Laboratory grade 25%